{
  "cves": [
    "CVE-2017-5715",
    "CVE-2017-5753"
  ],
  "cvss": 0.0,
  "database_specific": {
    "severity": "IMPORTANT"
  },
  "description": "[4.1.12-112.14.5]\n- x86/ibrs: Remove 'ibrs_dump' and remove the pr_debug (Konrad Rzeszutek Wilk)  [Orabug: 27350825]\n\n[4.1.12-112.14.4]\n- kABI: Revert kABI: Make the boot_cpu_data look normal (Konrad Rzeszutek Wilk)   {CVE-2017-5715}\n\n[4.1.12-112.14.3]\n- userns: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- udf: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- net: mpls: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- fs: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- ipv6: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- ipv4: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- Thermal/int340x: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- cw1200: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- qla2xxx: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- p54: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- carl9170: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- uvcvideo: prevent speculative execution (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- bpf: prevent speculative execution in eBPF interpreter (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- locking/barriers: introduce new observable speculation barrier (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- x86/cpu/AMD: Remove now unused definition of MFENCE_RDTSC feature (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- x86/cpu/AMD: Make the LFENCE instruction serialized (Elena Reshetova)  [Orabug: 27340459]  {CVE-2017-5753}\n- kABI: Make the boot_cpu_data look normal. (Konrad Rzeszutek Wilk)  [Orabug: 27339995]  {CVE-2017-5715}\n- kernel.spec: Require the new microcode_ctl. (Konrad Rzeszutek Wilk)  [Orabug: 27339995]  {CVE-2017-5715} {CVE-2017-5715}\n- x86/microcode/AMD: Add support for fam17h microcode loading (Tom Lendacky)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/spec_ctrl: Disable if running as Xen PV guest. (Konrad Rzeszutek Wilk)  [Orabug: 27339995]  {CVE-2017-5715}\n- Set IBPB when running a different VCPU (Dave Hansen)  [Orabug: 27339995]  {CVE-2017-5715}\n- Clear the host registers after setbe (Jun Nakajima)  [Orabug: 27339995]  {CVE-2017-5715}\n- Use the ibpb_inuse variable. (Jun Nakajima)  [Orabug: 27339995]  {CVE-2017-5715}\n- KVM: x86: add SPEC_CTRL to MSR and CPUID lists (Andrea Arcangeli)  [Orabug: 27339995]  {CVE-2017-5715}\n- kvm: vmx: add MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD (Paolo Bonzini)  [Orabug: 27339995]  {CVE-2017-5715}\n- Use the 'ibrs_inuse' variable. (Jun Nakajima)  [Orabug: 27339995]  {CVE-2017-5715}\n- kvm: svm: add MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD (Andrea Arcangeli)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/svm: Set IBPB when running a different VCPU (Paolo Bonzini)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/kvm: Pad RSB on VM transition (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/cpu/AMD: Add speculative control support for AMD (Tom Lendacky)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/microcode: Recheck IBRS and IBPB feature on microcode reload (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86: Move IBRS/IBPB feature detection to scattered.c (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/spec_ctrl: Add lock to serialize changes to ibrs and ibpb control (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/spec_ctrl: Add sysctl knobs to enable/disable SPEC_CTRL feature (Konrad Rzeszutek Wilk)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/kvm: clear registers on VM exit (Tom Lendacky)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/kvm: Set IBPB when switching VM (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- *INCOMPLETE* x86/syscall: Clear unused extra registers on syscall entrance (Konrad Rzeszutek Wilk)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/entry: Stuff RSB for entry to kernel for non-SMEP platform (Konrad Rzeszutek Wilk)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/mm: Only set IBPB when the new thread cannot ptrace current thread (Konrad Rzeszutek Wilk)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/mm: Set IBPB upon context switch (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/idle: Disable IBRS when offlining cpu and re-enable on wakeup (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/idle: Disable IBRS entering idle and enable it on wakeup (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/spec_ctrl: save IBRS MSR value in paranoid_entry (Andrea Arcangeli)  [Orabug: 27339995]  {CVE-2017-5715}\n- *Scaffolding* x86/spec_ctrl: Add sysctl knobs to enable/disable SPEC_CTRL feature (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/enter: Use IBRS on syscall and interrupts (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86: Add macro that does not save rax, rcx, rdx on stack to disable IBRS (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/enter: MACROS to set/clear IBRS and set IBP (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/feature: Report presence of IBPB and IBRS control (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86: Add STIBP feature enumeration (Konrad Rzeszutek Wilk)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/cpufeature: Add X86_FEATURE_IA32_ARCH_CAPS and X86_FEATURE_IBRS_ATT (Konrad Rzeszutek Wilk)  [Orabug: 27339995]  {CVE-2017-5715}\n- x86/feature: Enable the x86 feature to control (Tim Chen)  [Orabug: 27339995]  {CVE-2017-5715}",
  "id": "ELSA-2018-4004",
  "ovalId": "oval:com.oracle.elsa:def:20184004",
  "source": "oracle_linux",
  "title": "ELSA-2018-4004:  Unbreakable Enterprise kernel security update (IMPORTANT)",
  "url": "https://linux.oracle.com/errata/ELSA-2018-4004.html"
}